1. Field of Invention
This invention relates to a semiconductor integrated circuit having a signal inverting circuit formed on a SOI (Silicon On Insulator) substrate and a sense amplifier of a memory.
2. Description of Related Art
The related art discloses a countermeasure in which SOI (Silicon On Insulator) technology is introduced to a semiconductor memory circuit to provide for high speed and high integration. A memory cell and various circuits are constituted by MOS transistors formed on a SOI substrate, and a body potential is partly or wholly fixed. This provides a circuit configuration that satisfies multiple requirements, such as priority for countermeasures for layout reduction and priority for operating performance. See Japanese Patent Unexamined Patent Publication Application No. 8-125034.